IEEE Computer Society Open Conference Statement & IEEE Event Conduct and Safery Statement
  IEEE Privacy Policy

ISMVL 2020
IEEE International Symposium
on Multiple-Valued Logic
Hitotsuba Shrine  Takachiho Gorge  Mango

Biographies of Invited Speakers

  1. Prof. Masayuki Ohzeki (Tohoku Univerisity, Tokyo Institute of Technology, Japan)

    Masayuki Ohzeki graduated with a Ph.D. in physics from Tokyo Institute of Technology in 2008, and subsequently spent one and a half years as a postdoctoral fellow. He worked as an assistant professor in the Kyoto University. Since 2016, he has been an associate professor at the Graduate School of Information Sciences at Tohoku University. His research interests are broad, including machine learning and its potential from a perspective of theoretical physics and itself. He was awarded the 6th Young Scientists' Award of the Physical Society of Japan, and the Young Scientists' Prize by The Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology in 2016.

  2. Prof. Ali Sheikholeslami (University of Toronto, Canada)

    Ali Sheikholeslami is a Professor in the Department of Electrical and Computer Engineering at the University of Toronto and the Head of the Fujitsu Co-Creation Research Laboratory at the same university. His research interests are in analog and mixed-signal circuit design, wireline communication, and hardware annealing for beyond CMOS Scaling. He has co-authored over 100 journal and conference publications, 10 patents, and a graduate-level textbook entitled "Understanding Jitter and Phase Noise".

  3. Dr. Alan Mishchenko (University of California Berkeley, USA)

    Alan Mishchenko graduated with M.S. from Moscow Institute of Physics and Technology (Moscow, Russia) in 1993 and received his Ph.D. from Glushkov Institute of Cybernetics (Kiev, Ukraine) in 1997. In 2002, he joined the EECS Department at University of California, Berkeley, where he is currently a full researcher. His research is in computationally efficient logic synthesis and formal verification.