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ISMVL 2023
IEEE International Symposium
on Multiple-Valued Logic

Final Program

In the following, days and times are shown in Japan Time (JST).

  • May 21:   ULSI Workshop and Reception
  • May 22:   Keynotes I and Sessions 1 - 3
  • May 23:   Keynote II, Sessions 4, Excursion, and Banquet
  • May 24:   Keynote III, Session 5, Plenary, and Reed-Muller Workshop

The program consists of 3 keynote addresses and 10 regular sessions.

  • Each keynote address: 60 min. including Q&A
  • Each regular session has up to 4 talks
  • A regular talk: 20-min presentation & 5-min Q&A

Sessions are held at the following rooms: (see the floor map)

  • Multipurpose Hall (Main Room):
    Welcome Reception, Opening, Keynote Addresses, Sessions 1A to 5A,
    Lunch, Plenary Session & Closing, and Reed-Muller Workshop

  • Small Hall (Sub Room):
    ULSI Workshop and Sessions 1B to 5B

Sunday, May 21, 2023 (JST)
14:00-17:00 ULSIWS/ISMVL Registration
14:30-16:30 Workshop on Post-Binary ULSI Systems
17:00-20:00 Welcome Reception at the Multipurpose Hall in Kunibiki Messe
Monday, May 22, 2023 (JST)
8:30-8:45 ISMVL Registration
8:45-9:00 Opening
9:00-10:00 [Keynote Address I]   Chair: Hiroki Nakahara
Tackling the Explosions of Data and Solutions with Low-Bitwidth Computing Architectures

Prof. Masato Motomura (Tokyo Inst. of Tech., Japan)
10:00-10:20 Coffee Break
10:20-12:00 [Session 1A]   Chair: Y. Iijima
Machine Learning Circuits
[Session 1B]   Chair: H. Machida
Non Classical Logics
12:00-13:20 Lunch (Symposium & Executive Committee Meeting)
13:20-15:00 [Session 2A]   Chair: Y. Iguchi
Madical & Healthcare
[Session 2B]   Chair: R. Ueno
Function Representation & Transformation
15:00-15:20 Coffee Break
15:20-17:00 [Session 3A]   Chair: M. Natsui
Signal/Data Processing
[Session 3B]   Chair: J. Pantović
Algebra & Clone
Tuesday, May 23, 2023 (JST)
9:00-10:00 [Keynote Address II]   Chair: Yasushi Yuminaka
A Challenge of Scalable Quantum Computing Control Systems

Prof. Takefumi Miyoshi (QuEL, Inc./e-trees. Japan, Inc./QIQB, Osaka University, Japan)
10:00-10:20 Coffee Break
10:20-12:00 [Session 4A]   Chair: M. Thornton
Quantum Circuits
[Session 4B]   Chair: T. Sasao
SAT Solvers
12:00-12:30 Short Break
12:30-18:30 Excursion (Lunch)
18:30-21:00 Banquet at the Shimane Art Museum
Wednesday, May 24, 2023 (JST)
9:00-10:00 [Keynote Address III]   Chair: Naofumi Homma
Card-based Cryptography: How to Securely Compute Multiple-valued Functions Using a Deck of Cards

Prof. Takaaki Mizuki (Tohoku University, Japan)
10:00-10:20 Coffee Break
10:20-11:35 [Session 5A]   Chair: S. Nagayama
[Session 5B]   Chair: R. Miyauchi
Emerging Applications
11:35-12:20 Plenary Session & Closing
12:20-13:20 Lunch
13:20-17:00 Reed-Muller Workshop

Papers in Sessions

[Session 1A]   Chair: Yosuke Iijima
Machine Learning Circuits
A Consideration on Ternary Adversarial Generative Networks
Kennichi Nakamura and Hiroki Nakahara
Write-Energy Relaxation of MTJ-Based Quantized Neural-Network Hardware
Ken Asano, Masanori Natsui, and Takahiro Hanyu
Easily Reconstructable Logic Functions
Tsutomu Sasao
[Session 1B]   Chair: Hajime Machida
Non Classical Logics
Kalmbach Implication in Orthomodular Posets
Kadir Emir and Jan Paseka
Natural Deduction with Explosion and Excluded Middle
Norihiro Kamide
Self-extensional Paradefinite Four-valued Modal Logic Compatible with Standard Modal Logic
Norihiro Kamide
An Inductive Construction for Many-Valued Coalgebraic Modal Logic
Chun-Yu Lin and Churn-Jung Liau
[Session 2A]   Chair: Yukihiro Iguchi
Medical & Healthcare
On Neural-Network-Based Detection for Hypertensive Subjects Using Classification of Retinal Fundus Photographs
Yuki Sonetsuji, Teijiro Isokawa, Naotake Kamiura, and Hitoshi Tabuchi
Predicting the Development of Chronic Lung Disease in Neonates from Chest X-ray Images Using Deep Learning
Ryunosuke Maeda, Daisuke Fujita, and Syoji Kobashi
Kidney Tumor Recognition from Abdominal CT Images using Transfer Learning
Sefatul Wasi, Saadia Binte Alam, Rashedur Rahman, M Ashraful Amin, and Syoji Kobashi
Detection of Osteochondritis Dissecans Using Convolutional Neural Networks for Computer-aided Diagnosis of Baseball Elbow
Kenta Sasaki, Daisuke Fujita, Kenta Takatsuji, Yoshihiro Kotoura, Masataka Minami, Yusuke Kobayashi, Tsuyoshi Sukenari, Yoshikazu Kida, Kenji Takahashi, and Syoji Kobashi
[Session 2B]   Chair: Rei Ueno
Function Representation & Transformation
Properties of the Reed-Muller-Fourier Spectra of Maiorana-McFarland Bent Functions
Claudio Moraga, Radomir Stanković, and Milena Stanković
Remarks on Gibbs Permutation Matrices for Ternary Bent Functions
Radomir Stanković, Milena Stanković, Claudio Moraga, and Jaakko Astola
Decomposition-Based Representation of Symmetric Multiple-Valued Functions
Shinobu Nagayama, Tsutomu Sasao, and Jon Butler
Logic Synthesis from Polynomials with Coefficients in the Field of Rationals
Bhavani Sampathkumar, Bailey Martin, Ritaja Das, Priyank Kalla, and Florian Enescu
[Session 3A]   Chair: Masanori Natsui
Signal/Data Processing
Delta-Sigma Domain Signal Processing: A Review with Relevant Topics in Stochastic Computing
Takao Waho, Akihisa Koyama, and Hitoshi Hayashi
PAM-4 Data Transmission Quality Evaluation Using Two- and Three-Dimensional Mapping of Received Symbols
Yasushi Yuminaka, Kazuharu Nakajima, and Yosuke Iijima
Evaluation and Symbol Classification of Multi-Valued Signaling Using Two-Dimensional Symbol Mapping with Linear Mixture Model
Yosuke Iijima, Kazuharu Nakajima, and Yasushi Yuminaka
Data Mining Using Multi-Valued Logic Minimization
Tsutomu Sasao
[Session 3B]   Chair: Jovanka Pantović
Algebra & Clone
Kleene Algebra With Tests for Weighted Programs
Igor Sedlar
On Quotient Algebras of Normal eo-algebras by Congruences
Mayuka F.Kawaguchi and Michiro Kondo
Search for Some Majority Operation and Studies of its Centralizing Monoid
Hajime Machida
Weak Bases for Maximal Clones
Mike Behrisch
[Session 4A]   Chair: Mitchell Thornton
Quantum Circuits
Towards an Automated Framework for Realizing Quantum Computing Solutions
Nils Quetschlich, Lukas Burgholzer, and Robert Wille
Optimized Density Matrix Representations: Improving the Basis for Noise-Aware Quantum Circuit Design Tools
Thomas Grurl, Jürgen Fuß, and Robert Wille
Using S Gates and Relative Phase Toffoli Gates to Improve T-Count in Quantum Boolean Circuits
David Clarino, Shohei Kuroda, and Shigeru Yamashita
Quick Computation of the Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits
Takashi Hirayama, Rin Suzuki, Katsuhisa Yamanaka, and Yasuaki Nishitani
[Session 4B]   Chair: Tsutomu Sasao
SAT Solvers
Benchmarking Łukasiewicz Logic Solvers with Properties of Neural Networks
Sandro Preto, Felip Manyà, and Marcelo Finger
Linking Łukasiewicz Logic and Boolean Maximum Satisfiability
Sandro Preto, Felip Manyà, and Marcelo Finger
A Tableau Calculus for Signed Maximum Satisfiability
Shuolin Li, Jordi Coll, Djamal Habet, Chu-Min Li, and Felip Manyà
From Ramon Llull To Lov Grover: Towards A Universal Logic Machine
George Opsahl and Marek Perkowski
[Session 5A]   Chair: Shinobu Nagayama
Multiple-Valued Logic Physically Unclonable Function in Photonic Integrated Circuits
Duncan MacFarlane, Hiva Shahoei, Ifeanyi Achu, Evan Stewart, Willam Oxford, and Mitchell Thornton
Higher-Order Boolean Masking Does Not Prevent Side-Channel Attacks on LWE/LWR-based PKE/KEMs
Kalle Ngo, Ruize Wang, Elena Dubrova, and Nils Paulsrud
Efficient DFA-Resistant AES Hardware Based on Concurrent Fault Detection Scheme
Rei Ueno, Yusuke Yagyu, and Naofumi Homma
[Session 5B]   Chair: Ryoichi Miyauchi
Emerging Applications
A Logical Method to Predict Outcomes After Coronary Artery Bypass Grafting
Tsutomu Sasao, Anders Holmgren, and Patrik Eklund
Discovering Emerging Applications of Multi-Valued Logic: Protocols for Human-Autonomy Teaming
Peter Shmerko, Marek Perkowski, Yumi Iwashita, Adrian Stoica, and Svetlana Yanushkevich
Some Consistency Criteria for Many-Valued Judgment Aggregation
Christian Fermüller

Brief Floor Map of Kunibiki Messe

Multipurpose Hall (Main Room):
    Welcome Reception, Opening, Keynote Addresses, Sessions 1A to 5A,
    Lunch, Plenary Session & Closing, and Reed-Muller Workshop

Small Hall (Sub Room):
    ULSI Workshop and Sessions 1B to 5B

The program consists of three keynote addresses and 37 high-quality papers in the following 10 sessions:

1A. Machine Learning Circuits
1B. Non Classical Logics
2A. Medical & Healthcare
2B. Function Rep. & Transform.
3A. Signal/Data Processing
3B. Algebra & Clone
4A. Quantum Circuits
4B. SAT Solvers
5A. Security
5B. Emerging Applications

The symposium offers you a great opportunity to follow the recent technologies and explore future directions in multiple-valued logic and its related areas.

Final Program

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